LLVM API Documentation
#include <SelectionDAGISel.h>
Inheritance diagram for llvm::SelectionDAGISel:
Public Member Functions | |
| SelectionDAGISel (TargetLowering &tli) | |
| virtual void | getAnalysisUsage (AnalysisUsage &AU) const |
| virtual bool | runOnFunction (Function &Fn) |
| unsigned | MakeReg (MVT::ValueType VT) |
| virtual void | EmitFunctionEntryCode (Function &Fn, MachineFunction &MF) |
| virtual void | InstructionSelectBasicBlock (SelectionDAG &SD)=0 |
| virtual bool | SelectInlineAsmMemoryOperand (const SDOperand &Op, char ConstraintCode, std::vector< SDOperand > &OutOps, SelectionDAG &DAG) |
| virtual HazardRecognizer * | CreateTargetHazardRecognizer () |
Public Attributes | |
| TargetLowering & | TLI |
| SSARegMap * | RegMap |
| SelectionDAG * | CurDAG |
| MachineBasicBlock * | BB |
Protected Member Functions | |
| void | ScheduleAndEmitDAG (SelectionDAG &DAG) |
| void | SelectInlineAsmMemoryOperands (std::vector< SDOperand > &Ops, SelectionDAG &DAG) |
Classes | |
| struct | CaseBlock |
Definition at line 36 of file SelectionDAGISel.h.
| llvm::SelectionDAGISel::SelectionDAGISel | ( | TargetLowering & | tli | ) | [inline] |
Definition at line 43 of file SelectionDAGISel.h.
| HazardRecognizer * SelectionDAGISel::CreateTargetHazardRecognizer | ( | ) | [virtual] |
CreateTargetHazardRecognizer - Return a newly allocated hazard recognizer to use for this target when scheduling the DAG.
Definition at line 3153 of file SelectionDAGISel.cpp.
Referenced by ScheduleAndEmitDAG().
| virtual void llvm::SelectionDAGISel::EmitFunctionEntryCode | ( | Function & | Fn, | |
| MachineFunction & | MF | |||
| ) | [inline, virtual] |
Definition at line 51 of file SelectionDAGISel.h.
| void SelectionDAGISel::getAnalysisUsage | ( | AnalysisUsage & | AU | ) | const [virtual] |
getAnalysisUsage - This function should be overriden by passes that need analysis information to do their job. If a pass specifies that it uses a particular analysis result to this function, it can then use the getAnalysis<AnalysisType>() function, below.
Reimplemented from llvm::Pass.
Definition at line 2606 of file SelectionDAGISel.cpp.
| virtual void llvm::SelectionDAGISel::InstructionSelectBasicBlock | ( | SelectionDAG & | SD | ) | [pure virtual] |
| unsigned SelectionDAGISel::MakeReg | ( | MVT::ValueType | VT | ) |
Definition at line 2602 of file SelectionDAGISel.cpp.
References llvm::SSARegMap::createVirtualRegister(), llvm::TargetLowering::getRegClassFor(), RegMap, and TLI.
| bool SelectionDAGISel::runOnFunction | ( | Function & | Fn | ) | [virtual] |
runOnFunction - Virtual method overriden by subclasses to do the per-function processing of the pass.
Implements llvm::FunctionPass.
Definition at line 2760 of file SelectionDAGISel.cpp.
References BB, llvm::MachineBasicBlock::begin(), llvm::Function::begin(), llvm::MachineFunction::construct(), DEBUG, E, llvm::MachineBasicBlock::end(), llvm::Function::end(), llvm::Value::getName(), llvm::MachineFunction::getSSARegMap(), llvm::TargetLowering::getTargetData(), llvm::TargetLowering::getTargetMachine(), MF, OptimizeGEPExpression(), RegMap, llvm::SplitCriticalEdge(), and TLI.
| void SelectionDAGISel::ScheduleAndEmitDAG | ( | SelectionDAG & | DAG | ) | [protected] |
Pick a safe ordering and emit instructions for each target node in the graph.
Definition at line 3121 of file SelectionDAGISel.cpp.
References BB, llvm::createBFS_DAGScheduler(), llvm::createBURRListDAGScheduler(), llvm::createSimpleDAGScheduler(), CreateTargetHazardRecognizer(), llvm::createTDListDAGScheduler(), DAG, llvm::TargetLowering::getSchedulingPreference(), ISHeuristic, listSchedulingBURR, noScheduling, llvm::ScheduleDAG::Run(), llvm::TargetLowering::SchedulingForLatency, simpleNoItinScheduling, simpleScheduling, TLI, llvm::SelectionDAG::viewGraph(), and ViewSchedDAGs.
| virtual bool llvm::SelectionDAGISel::SelectInlineAsmMemoryOperand | ( | const SDOperand & | Op, | |
| char | ConstraintCode, | |||
| std::vector< SDOperand > & | OutOps, | |||
| SelectionDAG & | DAG | |||
| ) | [inline, virtual] |
SelectInlineAsmMemoryOperand - Select the specified address as a target addressing mode, according to the specified constraint code. If this does not match or is not implemented, return true. The resultant operands (which will appear in the machine instruction) should be added to the OutOps vector.
Definition at line 59 of file SelectionDAGISel.h.
Referenced by SelectInlineAsmMemoryOperands().
| void SelectionDAGISel::SelectInlineAsmMemoryOperands | ( | std::vector< SDOperand > & | Ops, | |
| SelectionDAG & | DAG | |||
| ) | [protected] |
SelectInlineAsmMemoryOperands - Calls to this are automatically generated by tblgen. Others should not call it.
Definition at line 3160 of file SelectionDAGISel.cpp.
References DAG, llvm::MVT::Flag, llvm::SelectionDAG::getConstant(), llvm::MVT::i32, and SelectInlineAsmMemoryOperand().
Definition at line 41 of file SelectionDAGISel.h.
Referenced by runOnFunction(), and ScheduleAndEmitDAG().
Definition at line 40 of file SelectionDAGISel.h.
Definition at line 38 of file SelectionDAGISel.h.
Referenced by MakeReg(), runOnFunction(), and ScheduleAndEmitDAG().